PhD Admissions Apr 2016

List of Selected Candidates for PhD admissions 2016

List of Shortlisted Candidates for PhD(CSE & ECE) Admissions Click Here
List of Shortlisted Candidates for PhD(Mathematics) Admissions Click Here

Areas

IIIT-Delhi invites applications for admission to PhD(CSE),  PhD(ECE) & PhD(Mathematics) programmes.

PhD (CSE) PhD (ECE) PhD (Mathematics) 
Augmented reality Biomedical Signal and Image processing Algebra
Computer Graphics Signal Processing on Graphs Coding Theory
Computer Vision Controls and Robotics Graph Theory
Information Management & Data Engineering Digital and Analog VLSI Systems Design Number Theory
Information Security Electromagnetics  
Machine Learning Embedded Systems  
Mobile Computing /IoT Fiber-Wireless Architectures and Light-Fidelity (Li-Fi)  
Program Analysis Multi-standard wireless communication receivers  
Quantum Computing Nonlinear Device Modelling  
Robotics OFDM based Optical Access Networks  
Scalable Data Analytics Optical Wireless Communication Systems  
Security and Privacy RF and mixed signal electronics  
Software Engineering Wireless Communication  
Theoretical Computer Science Wireless Network  
Visualization    
Virtual reality    
Wireless Networks    
Important Dates
  • Online application form starts on - 10th March 2016
  • Last date of application - 27th March 2016
  • Announcement of shortlisted candidates - 31st March 2016
  • PhD admission exam & interview - 9th April 2016
  • PhD admission result announcement - 16th April 2016
  • Fresh B.Tech. graduates with research aptitude are strongly encouraged to apply. GATE score is not mandatory.
  • Students who wish to have a global exposure may enroll in the collaborative PhD program with selected partner groups/institutes across the world. Students are also eligible for IIIT-Delhi Overseas Research Fellowship under this program (details).
  • Industry / employed persons have an option to pursue a sponsored full-time PhD program (details).
  • IIIT-Delhi provides relaxation to SC/ST, PH and CW category candidates (details).
  • For the full details of the PhD program and requirements for its successful completion, please refer to this page.
  • More than 100 PhD scholars. Many with fellowships from Prime Minister’s fellowship scheme, IBM, TCS, Visvesvaraya.
  • Highly prolific faculty. Collaborations with leading international research groups.

 

Eligibility Criteria

IIIT-Delhi is looking for candidates who have solid foundations in CS/ECE/Mathematics (including good programming expertise in the relevant domain), and interest in pursuing research in one of the above-mentioned areas. GATE/GRE scores are optional. Specific eligibility criteria are given below.

For CSE/ ECE Students
  • BTech/ BE/ MTech/ MS/ ME in CS/ IT/ ECE/ EE
    • CGPA at least 7.5 on a scale of 10 (or equivalent). If your institute does not provide CGPA in the transcript, then at least 70% marks are required to be eligible.
    • MCA/MSc(CS/IT/ECE/EE and allied areas) degree is considered equivalent to the BTech/BE degree. Such students are also eligible to apply with the condition that they have BSc in Computer Science or BSc in any other subject with Mathematics as one of the courses. The marks requirement is same as that given above for BTech/BE degrees.
    • Candidates with MTech/ MS/ ME degree should also have same marks requirement at UG level.
  • MSc in Mathematics is also eligible for PhD in CS/ ECE who meets the following requirements:
    • At least 70% marks in both B.Sc and M.Sc.
    • Strong inclination towards CS/ECE.
For Mathematics Students
  • BTech/ MTech/ BE / ME in CS/ ECE/ Maths & CS and similar inter-disciplinary programs
    • CGPA at least 7.5 on a scale of 10 (or equivalent). If your institute does not provide CGPA in the transcript, then at least 70% marks are required to be eligible.
    • Candidates with MTech/ MS/ ME degree should also have same marks requirement at UG level.
  • MSc in Mathematics is also eligible for PhD in Mathematics who meets the following requirements:
    • At least 70% marks in both B.Sc. and M.Sc.
  • Essential qualification (for Mathematics students)- JRF from either UGC or CSIR or NBHM or GATE qualified.

IIIT-Delhi provides relaxation to SC, ST, PH and CW category candidates.

Note: Candidates who are appearing in the final examination are also eligible to apply. They are required to give their last CGPA/aggregate percentage of marks. Requirements may be relaxed for exceptional candidates with publications/ R&D/software development experience in their area of interest or those from institutes of national and international repute.

Application Process
  1. Fill up the online application form.
  2. The candidates will be screened based on the information provided in the online application form.

The Last date to submit online application: 27th March 2016

Documents: Shortlisted candidates MUST bring with them the following documents in original for the purpose of verification of facts furnished in the application form.

  1. A Copy of application form and statement of purpose
  2. One recent passport size photograph
  3. Original mark sheets, degree, and certificates (including X, XII, undergraduate, etc.)
  4. Proof of date of birth and photo identification
  5. Copies of all publications (if any)
  6. GATE/GRE/TOEFL/other score cards (if any)
  7. Original copies of awards
  8. Sponsoring Certificate (for sponsored candidates)
  9. Any other document (in original form) that you have mentioned in the application form

You must bring with you COPIES of the above documents without fail. In case, your last semester exam is not yet over or the results have not yet been declared, you should bring mark sheets / grade cards of all the previous semesters whose results have been declared.

Selection Process for PhD (CSE)

The shortlisted candidates will have to appear in a written test and an interview at IIIT-Delhi on 9th April 2016.
Venue: IIIT-Delhi

  • Reporting date: 9th April 2016 (Saturday)
  • Registration time: 7.30 A.M.
  • Following is the tentative schedule for rest of the day.
  • The Written test starts at 9:00 A.M.
  • Refreshments: 10.30 A.M. (only for candidates)
  • Interview (for selected candidates): 01.30 P.M.
Written Test

Written test: The written test will have two sections (Part A and B) as described below. The questions will be on standard B.Tech. level concepts (MSc for non CS/IT areas). Syllabus for the test is given below. The questions may be a mixture of multiple choice, fill in the blanks, one-two line answers, and similar short answers. They will not require long descriptive answers. Use of calculators and similar computing devices will not be permitted.

  • Part-A is compulsory. This section will have questions from discrete maths, data structures, algorithms and programming concepts.
    • Syllabus:
      Sets, Relations, Boolean Algebra, Combinatorics, Summation, Asymptotic notation, Recurrences, Basic data structures (arrays, linked lists, stacks, queues), Trees, Graphs, Sorting, Graph algorithms, Dynamic programming, Divide and conquer, Heaps, Hash tables, Basic programming concepts.
  • In Part-B, candidates need to choose ANYONE from the following 5 subsections. The candidate will have to specify their choice during registration ON THE MORNING of the test.
    1. Linear algebra, probability, statistics, logic.
      §  Syllabus:
      Mathematical Logic: Propositional Logic; First Order Logic.
      Probability: Conditional Probability; Mean, Median, Mode and Standard Deviation; Bayes Theorem, Random Variables; Distributions; uniform, normal, exponential, Poisson, Binomial.
      Probability & Statistics: Probability space, conditional probability, Bayes theorem, independence, Random variables, joint and conditional distributions, standard probability distributions and their properties, expectation, conditional expectation, moments; Weak and strong law of large numbers, central limit theorem; Mean, Median, Mode and Variance, Testing of hypotheses, Distributions; uniform, normal, exponential, Poisson, Binomial.
      Linear Algebra: Algebra of matrices, determinants, systems of linear equations, Eigen values and Eigen vectors.
    2. Computer networks, operating systems
      §  Syllabus:
      Computer Networks: ISO/OSI stack, LAN technologies (Ethernet, Token ring), Flow and error control techniques, Routing algorithms, Congestion control, TCP/UDP and sockets, IP(v4), Application layer protocols (icmp, dns, smtp, pop, ftp, http); Basic concepts of hubs, switches, gateways, and routers. Network security  basic concepts of public key and private key cryptography, digital signature, firewalls.
      Operating System: Processes, Threads, Inter-process communication, Concurrency, Synchronization, Deadlock, CPU scheduling, Memory management and virtual memory, File systems, I/O systems, Protection and security.
    3. Databases and software engineering
      §  Syllabus:
      Databases: ER-model, Relational model (relational algebra, tuple calculus), Database design (integrity constraints, normal forms), Query languages (SQL), File structures (sequential files, indexing, B and B+ trees), Transactions and concurrency control.
      Information Systems and Software Engineering: information gathering, requirement and feasibility analysis, data flow diagrams, process specifications, input/output design, process life cycle, planning and managing the project, design, coding, testing, implementation, maintenance.
    4. Computer hardware
      §  Syllabus:
      Digital Logic: Logic functions, Minimization, Design and synthesis of combinational and sequential circuits; Number representation and computer arithmetic (fixed and floating point).
      Computer Organization and Architecture: Machine instructions and addressing modes, ALU and data-path, CPU control design, Memory interface, I/O interface (Interrupt and DMA mode), Instruction pipelining, Cache and main memory, Secondary storage.
    5. Artificial intelligence, machine learning and image processing
      §  Syllabus:
      Image understanding and representation, Image transformations, Filtering, noise removal, Edge detection, Color image processing, and transformations, Decision tree, and Bayes classification.
Interview
  • Shortlisted candidates (after the written test) will be interviewed on the same day.
  • The final list, based on the performance in the test and the interview will be the list of admitted candidates.
  • All admission decisions (i.e. screening, shortlisting, and selection) made by the IIIT-D PhD Admission Committee will be final.

Selection Process for PhD (ECE)

The shortlisted candidates will have to appear in a written test and an interview at IIIT-Delhi on 9th April 2016.
Venue: IIIT-Delhi

  • Reporting date: 9th April 2016 (Saturday)
  • Registration time: 7.30 A.M.
  • Following is the tentative schedule for rest of the day.
  • The Written test starts at 9:00 A.M.
  • Refreshments: 10.30 A.M. (only for candidates)
  • Interview (for selected candidates): 01.30 P.M.
Written Test

Written test: The written test will have two sections (Part A and B) as described below. The questions will be on standard B.Tech. level concepts. Syllabus for the test is given below.The questions may be a mixture of multiple choice, fill in the blanks, one-two line answers, and similar short answers. They will not require long descriptive answers. Use of calculators and similar computing devices will not be permitted.

  • Part-A is compulsory. This section will have questions from circuit theory, calculus and probability.
    • Syllabus: 
      Calculus: Mean value theorems, Theorems of integral calculus, Maxima and minima, First order differential equation (linear and nonlinear), Initial and boundary value problems
      Probability: Conditional probability, Random variables, Discrete and continuous distributions, Poisson, Normal and Binomial distribution
      Circuits: Thevenin and Norton's maximum power transfer, Wye-Delta transformation. Time domain analysis of simple RLC circuits, Solution of network equations using Laplace transform: frequency domain analysis of RLC circuits.
  • In Part-B, candidates need to choose ANYONE from the following 4 subsections. The candidate will have to specify their choice during registration on the morning of the test.
    1. Digital Circuits
      §  Syllabus:
      Boolean algebra, minimization of Boolean functions; logic gates; digital IC families (DTL, TTL, ECL, MOS, CMOS). Combinatorial circuits: arithmetic circuits, multiplexers, decoders, PROMs and PLAs. Sequential circuits: latches and flip-flops, counters and shift-registers. Sample and hold circuits, ADCs, DACs. Semiconductor memories. Microprocessor: architecture, programming, memory and I/O interfacing.
    2. Signals and Systems
      §  Syllabus:
      Definitions and properties of Laplace transform, continuous-time and discrete-time Fourier series, continuous-time and discrete-time Fourier Transform, DFT and FFT, z-transform. Sampling theorem. Linear Time-Invariant (LTI) Systems: definitions and properties; causality, stability, impulse response, convolution, poles and zeros, parallel and cascade structure, frequency response, group delay, phase delay. Signal transmission through LTI systems.
    3. Analog Circuits
      §  Syllabus:
      Analog Circuits: Small Signal Equivalent circuits of diodes, BJTs, MOSFETs and analog CMOS. Simple diode circuits, clipping, clamping, rectifier. Biasing and bias stability of transistor and FET amplifiers. Amplifiers: single and multi-stage, differential and operational, feedback, and power. The frequency response of amplifiers. Simple op-amp circuits. Filters. Sinusoidal oscillators; criterion for oscillation; single-transistor and op-amp configurations. Function generators and wave-shaping circuits, 555 Timers. Power supplies.
    4. Communication Systems
      §  Syllabus:
      Random signals and noise: probability, random variables, probability density function, autocorrelation, power spectral density. Analog communication systems: amplitude and angle modulation and demodulation systems, spectral analysis of these operations, signal-to-noise ratio (SNR) calculations for amplitude modulation (AM) and frequency modulation (FM) for low noise conditions.Digital communication systems: pulse code modulation (PCM), differential pulse code modulation (DPCM), digital modulation schemes: amplitude, phase and frequency shift keying schemes (ASK, PSK, FSK), matched filter receivers, bandwidth consideration and the probability of error calculations for these schemes. Basics of TDMA, FDMA and CDMA and GSM.
Interview
  • Shortlisted candidates (after the written test) will be interviewed on the same day.
  • Apart from general problem-solving questions, interview MAY also involves writing small code in C, Verilog/VHDL or microcontroller programming.
  • The final list, based on the performance in the tests and the interview, will be the list of admitted candidates.
  • All admission decisions (i.e. screening, shortlisting, and selection) made by the IIIT-D PhD Admission Committee will be final.

Additional requirements for candidates apply in ECE:

Advanced Signal Processing Statistical Signal Processing Digital VLSI Design Analog CMOS design
Digital Communications Communication Networks Linear systems Introduction to Robotics
RF Circuit design Antennas and Propagation Embedded systems  
  • MTech candidates applying in ECE must mention 3 courses in the application out of the courses listed below. The candidate shall be interviewed in the courses mentioned in the application.
  • BTech candidates applying in ECE must mention 4 courses in the application out of the courses listed below. The candidate shall be interviewed in the courses mentioned in the application.
  • *For syllabus, click here

Selection Process for PhD (Mathematics)

The shortlisted candidates will have to appear in an interview at IIIT-Delhi on 9th April 2016. There will be no written test for PhD (Mathematics).
Venue: IIIT-Delhi

  • Reporting date: 9th April 2016 (Saturday)
  • Registration time: 7:30 A.M.
  • Interview starts at 9:30 A.M.

All admission decisions (i.e. screening, shortlisting, and selection) made by the IIIT-D PhD Admission Committee will be final.

Travel logistics: For the outstation candidates (non-NCR) who are shortlisted to appear for the written test, IIIT-Delhi will reimburse their travel fare by second sleeper or public bus fare by the shortest route, whichever is cheapest. They will have to furnish the proof of travel. If a candidate decides to choose a different mode (e.g. 3AC, air, etc.), IIIT-Delhi will only reimburse the second sleeper or public transport bus fare by the shortest route possible.

Accommodation logistics: IIIT-Delhi will be able to provide accommodation to a limited number of shortlisted candidates on a first-come-first-serve basis. Shortlisted candidates can indicate their preference by writing to phd-admissions@iiitd.ac.in

Contact: For general queries, please refer to the frequently asked questions. For other information, you may contact us through email at phd-admissionsiiitd.ac.in. Limited support over IVRS is provided at the phone number 011-26907400 (no further support will be provided over the telephone).

Please do not email us with your resume/C.V - applications will be entirely online only through this website.
Please check this page for future announcements and more information. 
Disclaimer: Admission to PhD programs will be provisional, subject to the approval of competent authority.